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 MC100LVEP111 Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver
The MC100LVEP111 is a low skew 1-to-10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The LVECL/LVPECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under LVPECL conditions. The LVEP111 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from lot to lot. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50W even if only one side is being used. When fewer than all ten pairs are used, identically terminate all the output pairs on the same package side whether used or unused. If no outputs on a single side are used, then leave these outputs open (unterminated). This will maintain minimum output skew. Failure to do this will result in a 10-20ps loss of skew margin (propagation delay) in the output(s) in use. The MC100LVEP111, as with most other LVECL devices, can be operated from a positive VCC supply in LVPECL mode. This allows the LVEP111 to be used for high performance clock distribution in +3.3V or +2.5V systems. Single ended input operation is limited to a VCC 3.0V in LVPECL mode, or VEE -3.0V in LVECL mode. Designers can take advantage of the LVEP111's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For more information on using LVPECL, designers should refer to Application Note AN1406/D.
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32-LEAD TQFP FA SUFFIX CASE 873A
MARKING DIAGRAM*
MC100 LVEP111 AWLYYWW 32 1
A WL YY WW
= Assembly Location = Wafer Lot = Year = Work Week
*For additional information, see Application Note AND8002/D
ORDERING INFORMATION
Device MC100LVEP111FA MC100LVEP111FAR2 Package TQFP TQFP Shipping 250 Units/Tray 2000 Tape & Reel
* * * * * * * * * * * * *
100ps Part-to-Part Skew 25ps Output-to-Output Skew Differential Design VBB Output 430ps Typical Propagation Delay High Bandwidth to 1.5 Ghz Typical LVPECL and HSTL mode: +2.375V to +3.8V VCC with VEE = 0V LVECL mode: 0V VCC with VEE = -2.375V to -3.8V 75k Internal Input Pulldown Resistors on CLKs, Pull up & Pulldown resistors on CLKs ESD Protection: >2KV HBM; >100V MM Moisture Sensitivity Level 2 For Additional Information, See Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 602 devices
(c) Semiconductor Components Industries, LLC, 1999
1
March, 2000 - Rev. 2
Publication Order Number: MC100LVEP111/D
MC100LVEP111
Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6
PIN DESCRIPTION
24 VCC Q2 Q2 Q1 Q1 Q0 Q0 VCC 25 26 27 28 23 22 21 20 19 18 17 16 15 14 13 VCC Q7 Q7 Q8 Q8 Q9 Q9 VCC CLK_SEL 0 1 Pins CLK0, CLK0 CLK1, CLK1 Q0:9, Q0:9 CLK_SEL VBB VCC VEE Function LVECL/LVPECL/HSTL CLK Input LVECL/LVPECL/HSTL CLK Input LVECL/LVPECL Outputs LVECL/LVPECL Active Clock Select Input Reference Voltage Output Positive Supply Negative, 0 Supply
MC100LVEP111
29 30 31 32 1 2 3 4 5 6 7 8 12 11 10 9
FUNCTION TABLE
Active Input CLK0, CLK0 CLK1, CLK1
VCC
CLK_SEL
CLK0 CLK0 VBB CLK1 CLK1 VEE
Figure 1. 32-Lead TQFP Pinout (Top View)
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 CLK0 CLK0 CLK1 CLK1 CLK_SEL VBB 0 1 Q4 Q4 Q5 Q5 Q6 Q6 Q7 Q7 Q8 Q8 Q9 Q9
Figure 2. Logic Symbol
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MC100LVEP111
MAXIMUM RATINGS*
Symbol VEE VCC VI VI Iout IBB TA Tstg JA JC Tsol Power Supply (VCC = 0V) Power Supply (VEE = 0V) Input Voltage (VCC = 0V, VI not more negative than VEE) Input Voltage (VEE = 0V, VI not more positive than VCC) Output Current VBB Sink/Source Current{ Operating Temperature Range Storage Temperature Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Solder Temperature (<2 to 3 Seconds: 245C desired) Still Air 500lfpm Continuous Surge Parameter Value -6.0 to 0 6.0 to 0 -6.0 to 0 6.0 to 0 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 265 Unit VDC VDC VDC VDC mA mA C C C/W C/W C
* Maximum Ratings are those values beyond which damage to the device may occur. { Use for inputs of same package only.
DC CHARACTERISTICS, ECL/LVECL (VCC = 0V, VEE = -3.3(+0.925, -0.5)V) (Note 5.)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL 1. 2. 3. 4. 5. Characteristic Power Supply Current (Note 1.) Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage Input LOW Voltage Output Reference Voltage (Note 3.) Input HIGH Voltage Common Mode Range (Note 4.) Input HIGH Current Input LOW Current 0.5 -150 Min 70 -1145 -1995 -1165 -1810 -1525 -1425 Typ 100 -1020 -1820 Max 120 -0895 -1650 -0880 -1625 -1325 0.0 150 0.5 -150 Min 70 -1145 -1995 -1165 -1810 -1525 -1425 25C Typ 100 -1020 -1820 Max 120 -0895 -1650 -0880 -1625 -1325 0.0 150 0.5 -150 Min 70 -1145 -1995 -1165 -1810 -1525 -1425 85C Typ 100 -1020 -1820 Max 120 -0895 -1650 -0880 -1625 -1325 0.0 150 150 Unit mA mV mV mV mV mV V A A
VEE + 1.2
VEE + 1.2
VEE + 1.2
VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating. All loading with 50 ohms to VCC-2.0 volts. Single ended input operation is limited VEE -3.0V in ECL/LVECL mode. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. Input and output parameters vary 1:1 with VCC.
DC CHARACTERISTICS, HSTL (VCC = 2.5(-0.125, +1.3)V, VEE = 0V)
-40C Symbol VIH VIL VX Characteristic Input HIGH Voltage Input LOW Voltage Input Crossover Voltage 120 680 70 100 Min Typ Max Min 1200 400 900 120 70 100 120 25C Typ Max Min 85C Typ Max Unit mV mV mV mA
ICC Power Supply Current (Note 6.) 70 100 6. VCC = 2.375V to 3.8V, VEE = 0V, all other pins floating.
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MC100LVEP111
DC CHARACTERISTICS, LVPECL (VCC = 3.3V 0.5V, VEE = 0V) (Note 11.)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current (Note 7.) Output HIGH Voltage (Note 8.) Output LOW Voltage (Note 8.) Input HIGH Voltage Input LOW Voltage Output Reference Voltage (Note 9.) Input HIGH Voltage Common Mode Range (Note 10.) Input HIGH Current Input LOW Current 0.5 -150 Min 70 2155 1305 2135 1490 1775 1.2 1875 Typ 100 2280 1480 Max 120 2405 1650 2420 1675 1975 3.3 150 0.5 -150 Min 70 2155 1305 2135 1490 1775 1.2 1875 25C Typ 100 2280 1480 Max 120 2405 1650 2420 1675 1975 3.3 150 0.5 -150 Min 70 2155 1305 2135 1490 1775 1.2 1875 85C Typ 100 2280 1480 Max 120 2405 1650 2420 1675 1975 3.3 150 150 Unit mA mV mV mV mV mV V A A
7. VCCmin to VCCmax. 8. All loading with 50 ohms to VCC-2.0 volts. 9. Single ended input operation is limited VCC 3.0V in PECL mode. 10. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 11. Input and output parameters vary 1:1 with VCC.
DC CHARACTERISTICS, LVEPECL (VCC = 2.5V 0.125V, VEE = 0V) (Note 15.)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR IIH IIL Characteristic Power Supply Current (Note 12.) Output HIGH Voltage (Note 13.) Output LOW Voltage (Note 13.) Input HIGH Voltage Input LOW Voltage Input HIGH Voltage Common Mode Range (Note 14.) Input HIGH Current Input LOW Current 0.5 -150 Min 70 1355 505 1335 690 1.2 Typ 100 1480 680 Max 120 1605 850 1620 875 2.5 150 0.5 -150 Min 70 1355 505 1335 690 1.2 25C Typ 100 1480 680 Max 120 1605 850 1620 875 2.5 150 0.5 -150 Min 70 1355 505 1335 690 1.2 85C Typ 100 1480 680 Max 120 1605 850 1620 875 2.5 150 150 Unit mA mV mV mV mV V A A
12. VCCmin to VCCmax. 13. All loading with 50 ohms to VEE. 14. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 15. Input and output parameters vary 1:1 with VCC.
AC CHARACTERISTICS (VCC = 0V; VEE = -2.5(+0.125, -1.3)V)
-40C Symbol fmaxLVPECL fmaxHSTL tPLH tPHL tskew VPP tr/tf Characteristic Maximum Input Frequency for LVECL and LVPECL Maximum Input Frequency for HSTL Propagation Delay to Output IN (differential) Within-Device Skew (17.) Part-to-Part Skew (Diff) (18.) Minimum Input Swing Output Rise/Fall Time (20%-80%) 150 100 300 Min Typ 1.5 250 400 20 100 800 180 1200 300 150 120 500 310 Max Min 25C Typ 1.5 250 430 20 100 800 200 550 25 1200 320 150 130 350 Max Min 85C Typ 1.5 250 510 20 100 800 230 1200 375 625 Max Unit GHz MHz ps ps mV ps
16. Fmax guaranteed for functionality only. 17. Skew is measured between outputs under identical transitions and conditions on any one device. 18. Part-to-part skew for identical transitions at identical VCC levels.
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MC100LVEP111
PACKAGE DIMENSIONS
FA SUFFIX PLASTIC TQFP PACKAGE CASE 873A-02 ISSUE A
A A1
32 25
4X
0.20 (0.008) AB T-U Z
BASE METAL
1
F
D
B1
8
DETAIL Y
17
V1
J
9
-Z- 9 S1 S
4X
SECTION AE-AE 0.20 (0.008) AC T-U Z
-AB-
SEATING PLANE
-T-, -U-, -Z-
G -AC- 0.10 (0.004) AC
8X
DETAIL AD
0.20 (0.008)
B
V
M_ R AE P
CE AE DETAIL Y X DETAIL AD
GAUGE PLANE
0.250 (0.010)
H
W
K
Q_
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EE EE EE
-T-
-U-
N
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
M
AC T-U Z
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
MC100LVEP111
Notes
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MC100LVEP111
Notes
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MC100LVEP111
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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MC100LVEP111/D


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